Optimizing Power-Performance Trade-off for Parallel Applications through Dynamic Core and Frequency Scaling

As power consumption being the first order constraint to build microprocessors, they are required to achieve high performance within the strictly limited power budget. For example, capping the peak power consumption is a strongly desired feature in large scale data centers or massive HPC machines. Future many-core processors are expected to host a variety of workloads which have different characteristics and requirements. Therefore, a novel runtime environment which can manage these applications in an energyefficient manner needs to be developed. Traditional dynamic voltage and frequency scaling (DVFS) which optimizes the trade-off between performance and power consumption offers an efficient execution for single-threaded applications. However, this is not always the case for multi-threaded applications executed on many-core processors depending on their parallelisms. We propose dynamic core and frequency scaling (DCFS) technique to optimize the power-performance trade-off for multithreaded applications. Our proposed technique adjusts core counts and CPU frequency depending on the parallelism of applications under the power consumption constraint. DCFS dynamically controls the settings to optimize against the behavior within programs. The evaluation results show that we can achieve 6% performance improvement on average across ten applications from PARSEC benchmarks and up to 35% for dedup.